1. Introduction
The Graphcore IPU hardware connects to the server chassis using PCIe. The PCIe CEM interface includes an SMBus which can be used by the chassis to read out specific parameters from the PCIe card.
1.1. Abbreviations
Name |
Description |
---|---|
ACK |
Acknowledge bit |
ARP |
Address Resolution Protocol |
CEM |
Card Electromechanical specification |
ICU |
IPU Control Unit (the microcontroller on the PCIe card) |
IPU |
Intelligence Processing Unit |
NACK |
A |
PCIe |
Peripheral Component Interconnect Express |
PEC |
Packet Error Code |
POST |
Power On Self-Test |
RMA |
Return Machine Authorisation process |
SMBus |
System Management Bus |
See the Graphcore glossary for definitions of other Graphcore-specific terminology.
1.2. Conventions
The term word
stands for 16 bits.