Tile Vertex Instruction Set Architecture

The tile vertex instruction set architecture (ISA) document describes the subset of the IPU instruction set used by worker threads on the IPU.

You can download the appropriate ISA document below:

In these documents, IPU2 refers to the Mk2 architecture used in the IPU-M2000 and Bow-2000 IPU-Machines. IPU21 is the Mk2 IPU with FP8 support, as used in the C600 PCIe IPU card.

For information on programming in assembly see the Poplar and PopLibs User Guide which describes the vector types and how to write vertices in assembly.


There may be links in the documents to unreleased information.